Day 12 Lab: UART RX, SPI & IP Integration¶
Starter Code & Notebooks
Download All Starter Code (.zip)
Open in JupyterLab Download .ipynb View on GitHub
Individual exercise downloads and file links are below each exercise.
Overview¶
Build the UART receiver with 16× oversampling, create a loopback test, and explore SPI master design or IP integration.
Prerequisites¶
- Working UART TX from Day 11
- Pre-class video on UART RX oversampling and SPI
Exercises¶
| # | Exercise | Time | Key SLOs |
|---|---|---|---|
| 1 | UART RX Module + Testbench | 40 min | 12.1, 12.2 |
| 2 | UART Loopback on Hardware | 25 min | 12.3 |
| 3 | SPI Master Module | 30 min | 12.4, 12.5 |
| 4 | UART-Controlled LED Pattern | 15 min | 12.3 |
| 5 | UART-to-SPI Bridge (Stretch) | 15 min | 12.4, 12.5 |
Deliverables¶
- UART RX with all test bytes passing in simulation
- Loopback working on hardware — type on PC, see echo (crown jewel!)
- SPI master verified in simulation