Academic Visit: Semidynamics¶
Date: Monday, June 1 · 4:00–5:30 PM Address: Avinguda de Josep Tarradelles, 20, Barcelona Meet: 3:50 PM at Semidynamics entrance
About Semidynamics¶
Founded in 2016 in Barcelona, Semidynamics designs RISC-V processors optimized for AI workloads. Their customizable CPU cores cut memory bottlenecks so machine learning models run faster with less energy. Everything is built on the open RISC-V standard.
Pre-Visit Framing (covered in morning class)¶
🌍 Connection to today's class: "The counters, shift registers, and testbenches you built this morning are the same building blocks inside every RISC-V pipeline stage Semidynamics ships."
Observation Questions¶
As you tour, look for answers to:
- Where are the FSMs? Ask about pipeline control, bus arbitration, or cache controllers. What states do they have?
- How do they verify? What fraction of their effort is verification vs. design? Do they use simulation, formal methods, or both?
- What's parameterized? RISC-V is modular — how do they configure cores for different customers?
CRAFT Reflection (due before next class)¶
Write 1 page max:
- 🌍 What did you see? Describe one system or process.
- ⚠️ What surprised you? What contradicted your expectations?
- 🔧 What connects? Which course concepts did you recognize?
- 🔗 What's next? How does this shift your thinking?